11 results (0.002 seconds)

CVSS: 7.2EPSS: 0%CPEs: 1312EXPL: 0

Unchecked return value in the firmware for some Intel(R) Processors may allow a privileged user to potentially enable an escalation of privilege via local access. Un valor de retorno no comprobado en el firmware de algunos procesadores Intel(R) puede permitir a un usuario con privilegios habilitar potencialmente una escalada de privilegios mediante acceso local. • https://security.netapp.com/advisory/ntap-20220210-0007 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00527.html • CWE-1188: Initialization of a Resource with an Insecure Default •

CVSS: 7.2EPSS: 0%CPEs: 1312EXPL: 0

Insecure default variable initialization for the Intel BSSA DFT feature may allow a privileged user to potentially enable an escalation of privilege via local access. Una inicialización no segura de variables predeterminadas para la funcionalidad Intel BSSA DFT puede permitir a un usuario con privilegios habilitar potencialmente una escalada de privilegios por medio de acceso local • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00525.html https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00527.html • CWE-1188: Initialization of a Resource with an Insecure Default •

CVSS: 6.4EPSS: 0%CPEs: 129EXPL: 0

Systems with microprocessors utilizing speculative execution and Intel software guard extensions (Intel SGX) may allow unauthorized disclosure of information residing in the L1 data cache from an enclave to an attacker with local user access via a side-channel analysis. Los sistemas con microprocesadores que emplean ejecución especulativa y extensiones Intel software guard (Intel SGX) podría permitir la fuga no autorizada de información que reside en la caché de datos L1 desde un enclave a un atacante con acceso de usuario local mediante un análisis de canal lateral. • http://support.lenovo.com/us/en/solutions/LEN-24163 http://www.huawei.com/en/psirt/security-advisories/huawei-sa-20180815-01-cpu-en http://www.securityfocus.com/bid/105080 http://www.securitytracker.com/id/1041451 https://cert-portal.siemens.com/productcert/pdf/ssa-254686.pdf https://cert-portal.siemens.com/productcert/pdf/ssa-608355.pdf https://foreshadowattack.eu https://lists.debian.org/debian-lts-announce/2018/09/msg00017.html https://psirt.global.sonicwall.com/vuln-detail/ • CWE-203: Observable Discrepancy •

CVSS: 7.6EPSS: 0%CPEs: 164EXPL: 0

Existing UEFI setting restrictions for DCI (Direct Connect Interface) in 5th and 6th generation Intel Xeon Processor E3 Family, Intel Xeon Scalable processors, and Intel Xeon Processor D Family allows a limited physical presence attacker to potentially access platform secrets via debug interfaces. Las restricciones de configuración UEFI existentes para DCI (Direct Connect Interface) en la familia E3 de procesadores Intel Xeon de 5ª y 6ª generación, los procesadores Intel Xeon Scalable y la familia D de procesadores Intel Xeon permiten que un atacante con presencia física limitada acceda potencialmente a los secretos de la plataforma mediante las interfaces de depuración. • https://security.netapp.com/advisory/ntap-20180802-0001 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00127.html • CWE-200: Exposure of Sensitive Information to an Unauthorized Actor •

CVSS: 5.9EPSS: 0%CPEs: 1095EXPL: 0

Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis. Los sistemas con microprocesadores que emplean la ejecución especulativa y la predicción de ramas podría permitir la divulgación no autorizada de información a un atacante con acceso de usuario local mediante un desbordamiento de búfer especulativo y el análisis de canal lateral. An industry-wide issue was found in the way many modern microprocessor designs have implemented speculative execution of instructions past bounds check. The flaw relies on the presence of a precisely-defined instruction sequence in the privileged code and the fact that memory writes occur to an address which depends on the untrusted value. Such writes cause an update into the microprocessor's data cache even for speculatively executed instructions that never actually commit (retire). • https://access.redhat.com/errata/RHSA-2018:2384 https://access.redhat.com/errata/RHSA-2018:2390 https://access.redhat.com/errata/RHSA-2018:2395 https://access.redhat.com/errata/RHSA-2019:1946 https://access.redhat.com/errata/RHSA-2020:0174 https://cdrdv2.intel.com/v1/dl/getContent/685359 https://help.ecostruxureit.com/display/public/UADCE725/Security+fixes+in+StruxureWare+Data+Center+Expert+v7.6.0 https://security.netapp.com/advisory/ntap-20180823-0001 https://www.oracle.com/s • CWE-200: Exposure of Sensitive Information to an Unauthorized Actor •