11 results (0.025 seconds)

CVSS: 5.6EPSS: 0%CPEs: 1321EXPL: 0

Load value injection in some Intel(R) Processors utilizing speculative execution may allow an authenticated user to potentially enable information disclosure via a side channel with local access. The list of affected products is provided in intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html Una inyección de valor de carga en algunos Procesadores Intel® que utilizan una ejecución especulativa puede permitir a un usuario autenticado habilitar potencialmente una divulgación de información por medio de un canal lateral con acceso local. La lista de productos afectados es proporcionada en intel-sa-00334: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html • https://security.netapp.com/advisory/ntap-20200320-0002 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00334.html •

CVSS: 5.6EPSS: 0%CPEs: 752EXPL: 0

Improper data forwarding in some data cache for some Intel(R) Processors may allow an authenticated user to potentially enable information disclosure via local access. The list of affected products is provided in intel-sa-00330: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00330.html Un reenvío de datos inapropiado en alguna cache de datos de algunos Procesadores Intel® puede permitir a un usuario autenticado habilitar potencialmente una divulgación de información por medio de un acceso local. La lista de productos afectados es proporcionada en intel-sa-00330: https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00330.html • https://security.netapp.com/advisory/ntap-20200320-0001 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00330.html •

CVSS: 7.2EPSS: 0%CPEs: 892EXPL: 0

Insufficient memory protection in Intel(R) TXT for certain Intel(R) Core Processors and Intel(R) Xeon(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. Una protección de memoria insuficiente en Intel® TXT para ciertos procesadores Intel® Core y procesadores Intel® Xeon® puede habilitar a un usuario privilegiado para permitir una escalada de privilegios por medio de un acceso local. • https://cert-portal.siemens.com/productcert/pdf/ssa-398519.pdf https://support.f5.com/csp/article/K34425791?utm_source=f5support&amp%3Butm_medium=RSS https://support.hpe.com/hpsc/doc/public/display?docLocale=en_US&docId=emr_na-hpesbhf03971en_us https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00240.html • CWE-119: Improper Restriction of Operations within the Bounds of a Memory Buffer •

CVSS: 4.8EPSS: 0%CPEs: 482EXPL: 0

A race condition in specific microprocessors using Intel (R) DDIO cache allocation and RDMA may allow an authenticated user to potentially enable partial information disclosure via adjacent access. Una condición de carrera en microprocesadores específicos que usan la asignación de la memoria caché DDIO y RDMA de Intel (R), puede permitir a un usuario autenticado habilitar potencialmente la divulgación de información parcial por medio de un acceso adyacente. • https://arxiv.org/abs/1909.04841 https://ieeexplore.ieee.org/document/9152768 https://security.netapp.com/advisory/ntap-20190926-0001 https://support.f5.com/csp/article/K43220413 https://support.f5.com/csp/article/K43220413?utm_source=f5support&amp%3Butm_medium=RSS https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00290.html • CWE-362: Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition') •

CVSS: 5.9EPSS: 0%CPEs: 1095EXPL: 0

Systems with microprocessors utilizing speculative execution and branch prediction may allow unauthorized disclosure of information to an attacker with local user access via a speculative buffer overflow and side-channel analysis. Los sistemas con microprocesadores que emplean la ejecución especulativa y la predicción de ramas podría permitir la divulgación no autorizada de información a un atacante con acceso de usuario local mediante un desbordamiento de búfer especulativo y el análisis de canal lateral. An industry-wide issue was found in the way many modern microprocessor designs have implemented speculative execution of instructions past bounds check. The flaw relies on the presence of a precisely-defined instruction sequence in the privileged code and the fact that memory writes occur to an address which depends on the untrusted value. Such writes cause an update into the microprocessor's data cache even for speculatively executed instructions that never actually commit (retire). • https://access.redhat.com/errata/RHSA-2018:2384 https://access.redhat.com/errata/RHSA-2018:2390 https://access.redhat.com/errata/RHSA-2018:2395 https://access.redhat.com/errata/RHSA-2019:1946 https://access.redhat.com/errata/RHSA-2020:0174 https://cdrdv2.intel.com/v1/dl/getContent/685359 https://help.ecostruxureit.com/display/public/UADCE725/Security+fixes+in+StruxureWare+Data+Center+Expert+v7.6.0 https://security.netapp.com/advisory/ntap-20180823-0001 https://www.oracle.com/s • CWE-200: Exposure of Sensitive Information to an Unauthorized Actor •