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CVSS: 7.9EPSS: 0%CPEs: 894EXPL: 0

Time-of-check time-of-use race condition in the BIOS firmware for some Intel(R) Processors may allow a privileged user to potentially enable escalation of privilege via local access. La condición de ejecución de tiempo de verificación y tiempo de uso en el firmware del BIOS para Intel(R) Processors, puede permitir que un usuario con privilegios habilite la escalada de privilegios a través del acceso local. • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00688.html • CWE-367: Time-of-check Time-of-use (TOCTOU) Race Condition •

CVSS: 6.0EPSS: 0%CPEs: 668EXPL: 0

Improper isolation of shared resources in some Intel(R) Processors may allow a privileged user to potentially enable information disclosure via local access. Un aislamiento inapropiado de los recursos compartidos en algunos procesadores Intel(R) puede permitir que un usuario privilegiado permita potencialmente la divulgación de información a través del acceso local. A flaw was found in hw. The APIC can operate in xAPIC mode (also known as a legacy mode), in which APIC configuration registers are exposed through a memory-mapped I/O (MMIO) page. This flaw allows an attacker who can execute code on a target CPU to query the APIC configuration page. • https://lists.debian.org/debian-lts-announce/2023/04/msg00000.html https://security.netapp.com/advisory/ntap-20220923-0002 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00657.html https://access.redhat.com/security/cve/CVE-2022-21233 https://bugzilla.redhat.com/show_bug.cgi?id=2115640 https://access.redhat.com/solutions/6971358 • CWE-200: Exposure of Sensitive Information to an Unauthorized Actor •

CVSS: 5.5EPSS: 0%CPEs: 983EXPL: 0

Non-transparent sharing of return predictor targets between contexts in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access. Una compartición no transparente de objetivos de predicción de retorno entre contextos en algunos procesadores Intel(R) puede permitir que un usuario autorizado permita potencialmente la divulgación de información por medio de acceso local. A flaw was found in hw. In certain processors with Intel's Enhanced Indirect Branch Restricted Speculation (eIBRS) capabilities, soon after VM exit or IBPB command event, the linear address following the most recent near CALL instruction prior to a VM exit may be used as the Return Stack Buffer (RSB) prediction. • https://lists.debian.org/debian-lts-announce/2022/09/msg00011.html https://lists.debian.org/debian-lts-announce/2022/10/msg00000.html https://security.netapp.com/advisory/ntap-20221007-0005 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00706.html https://access.redhat.com/security/cve/CVE-2022-26373 https://bugzilla.redhat.com/show_bug.cgi?id=2115065 https://access.redhat.com/solutions/6971358 • CWE-200: Exposure of Sensitive Information to an Unauthorized Actor •

CVSS: 2.4EPSS: 0%CPEs: 918EXPL: 0

Sensitive information accessible by physical probing of JTAG interface for some Intel(R) Processors with SGX may allow an unprivileged user to potentially enable information disclosure via physical access. Una información confidencial accesible mediante el sondeo físico de la interfaz JTAG para algunos procesadores Intel(R) con SGX puede permitir que un usuario no privilegiado permita potencialmente una divulgación de información por medio del acceso físico • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00614.html • CWE-319: Cleartext Transmission of Sensitive Information •

CVSS: 7.2EPSS: 0%CPEs: 796EXPL: 0

Hardware debug modes and processor INIT setting that allow override of locks for some Intel(R) Processors in Intel(R) Boot Guard and Intel(R) TXT may allow an unauthenticated user to potentially enable escalation of privilege via physical access. Los modos de depuración de hardware y la configuración INIT del procesador que permiten la anulación de bloqueos para algunos procesadores Intel(R) en Intel(R) Boot Guard e Intel(R) TXT pueden permitir que un usuario no autenticado permita potencialmente una escalada de privilegios por medio del acceso físico • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00613.html •