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CVSS: 5.5EPSS: 0%CPEs: 304EXPL: 0

Insufficient bounds checking in ASP may allow an attacker to issue a system call from a compromised ABL which may cause arbitrary memory values to be initialized to zero, potentially leading to a loss of integrity. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-4001 • CWE-120: Buffer Copy without Checking Size of Input ('Classic Buffer Overflow') •

CVSS: 7.1EPSS: 0%CPEs: 46EXPL: 0

Insufficient address validation, may allow an attacker with a compromised ABL and UApp to corrupt sensitive memory locations potentially resulting in a loss of integrity or availability. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 •

CVSS: 9.8EPSS: 0%CPEs: 96EXPL: 0

Insufficient input validation of mailbox data in the SMU may allow an attacker to coerce the SMU to corrupt SMRAM, potentially leading to a loss of integrity and privilege escalation. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 •

CVSS: 5.3EPSS: 0%CPEs: 100EXPL: 0

Insufficient input validation in the SMU may allow an attacker to improperly lock resources, potentially resulting in a denial of service. Una validación de entrada insuficiente en la SMU puede permitir que un atacante bloquee recursos incorrectamente, lo que podría provocar una denegación de servicio. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-1032 • CWE-20: Improper Input Validation •

CVSS: 7.5EPSS: 0%CPEs: 100EXPL: 0

Insufficient bound checks in the SMU may allow an attacker to update the SRAM from/to address space to an invalid value potentially resulting in a denial of service. Las comprobaciones limitadas insuficientes en la SMU pueden permitir que un atacante actualice la SRAM desde/hacia el espacio de direcciones a un valor no válido, lo que podría provocar una denegación de servicio. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-1032 • CWE-119: Improper Restriction of Operations within the Bounds of a Memory Buffer •