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CVSS: 7.2EPSS: 0%CPEs: 796EXPL: 0

Hardware debug modes and processor INIT setting that allow override of locks for some Intel(R) Processors in Intel(R) Boot Guard and Intel(R) TXT may allow an unauthenticated user to potentially enable escalation of privilege via physical access. Los modos de depuración de hardware y la configuración INIT del procesador que permiten la anulación de bloqueos para algunos procesadores Intel(R) en Intel(R) Boot Guard e Intel(R) TXT pueden permitir que un usuario no autenticado permita potencialmente una escalada de privilegios por medio del acceso físico • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00613.html •

CVSS: 6.8EPSS: 0%CPEs: 419EXPL: 0

Hardware allows activation of test or debug logic at runtime for some Intel(R) Trace Hub instances which may allow an unauthenticated user to potentially enable escalation of privilege via physical access. El hardware permite una activación de la lógica de prueba o depuración en tiempo de ejecución para algunas instancias del Intel(R) Trace Hub, lo que puede permitir que un usuario no autenticado habilite potencialmente la escalada de privilegios por medio del acceso físico • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00609.html •

CVSS: 6.5EPSS: 0%CPEs: 458EXPL: 0

Non-transparent sharing of branch predictor selectors between contexts in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access. La compartición no transparente de selectores de predicción de rama entre contextos en algunos procesadores Intel(R) puede permitir que un usuario autorizado permita potencialmente una divulgación de información por medio del acceso local A flaw was found in hw. The Branch History Injection (BHI) describes a specific form of intra-mode BTI. This flaw allows an unprivileged attacker to manipulate the branch history before transitioning to supervisor or VMX root mode. This issue is an effort to cause an indirect branch predictor to select a specific predictor entry for an indirect branch, and a disclosure gadget at the predicted target will transiently execute. • http://www.openwall.com/lists/oss-security/2022/03/18/2 https://security.netapp.com/advisory/ntap-20220818-0004 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00598.html https://www.kb.cert.org/vuls/id/155143 https://www.oracle.com/security-alerts/cpujul2022.html https://access.redhat.com/security/cve/CVE-2022-0001 https://bugzilla.redhat.com/show_bug.cgi?id=2061712 •

CVSS: 6.5EPSS: 0%CPEs: 504EXPL: 0

Non-transparent sharing of branch predictor within a context in some Intel(R) Processors may allow an authorized user to potentially enable information disclosure via local access. La compartición no transparente de selectores de predicción de rama dentro de un contexto en algunos procesadores Intel(R) puede permitir que un usuario autorizado permita potencialmente una divulgación de información por medio del acceso local A flaw was found in hw. The Intra-mode BTI refers to a variant of Branch Target Injection aka SpectreV2 (BTI) where an indirect branch speculates to an aliased predictor entry for a different indirect branch in the same predictor mode, and a disclosure gadget at the predicted target transiently executes. These predictor entries may contain targets corresponding to the targets of an indirect near jump, indirect near call, and near return instructions, even if these branches were only transiently executed. The managed runtimes provide an attacker with the means to create the aliasing required for intra-mode BTI attacks. • http://www.openwall.com/lists/oss-security/2022/03/18/2 https://security.netapp.com/advisory/ntap-20220818-0004 https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00598.html https://www.oracle.com/security-alerts/cpujul2022.html https://access.redhat.com/security/cve/CVE-2022-0002 https://bugzilla.redhat.com/show_bug.cgi?id=2061721 •

CVSS: 5.5EPSS: 0%CPEs: 50EXPL: 0

Out of bounds read under complex microarchitectural condition in memory subsystem for some Intel Atom(R) Processors may allow authenticated user to potentially enable information disclosure or cause denial of service via network access. Una lectura fuera de límites bajo una condición micro arquitectónica compleja en el subsistema de memoria para algunos procesadores Intel Atom(R) puede permitir a un usuario autenticado habilitar potencialmente una divulgación de información o causar una denegación de servicio por medio del acceso a la red • https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-00589.html • CWE-125: Out-of-bounds Read •