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CVSS: 7.5EPSS: 0%CPEs: 96EXPL: 0

Insufficient input validation in the SMU may enable a privileged attacker to write beyond the intended bounds of a shared memory buffer potentially leading to a loss of integrity. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 • CWE-787: Out-of-bounds Write •

CVSS: 9.1EPSS: 0%CPEs: 96EXPL: 0

Insufficient input validation in the SMU may allow an attacker to corrupt SMU SRAM potentially leading to a loss of integrity or denial of service. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-5001 • CWE-20: Improper Input Validation •

CVSS: 7.1EPSS: 0%CPEs: 46EXPL: 0

Insufficient address validation, may allow an attacker with a compromised ABL and UApp to corrupt sensitive memory locations potentially resulting in a loss of integrity or availability. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 •

CVSS: 9.8EPSS: 0%CPEs: 96EXPL: 0

Insufficient input validation of mailbox data in the SMU may allow an attacker to coerce the SMU to corrupt SMRAM, potentially leading to a loss of integrity and privilege escalation. • https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-3001 •

CVSS: 4.7EPSS: 0%CPEs: 340EXPL: 0

When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT mode switch potentially resulting in information disclosure. A flaw was found in HW. When SMT is enabled, certain AMD processors may speculatively execute instructions using a target from the sibling thread after an SMT mode switch, potentially resulting in information disclosure. • https://security.gentoo.org/glsa/202402-07 https://www.amd.com/en/corporate/product-security/bulletin/AMD-SB-1045 https://access.redhat.com/security/cve/CVE-2022-27672 https://bugzilla.redhat.com/show_bug.cgi?id=2174765 •